๐๏ธ
VLSI Design
VLSI ยท ADVANCED
~3 marks in GATE12 Topics15 years PYQs
๐ Topics Covered
1
CMOS Inverter2
CMOS Logic Gates3
Stick Diagrams4
Layout Design5
Static Timing Analysis6
Clock Tree Synthesis7
Synthesis8
Place & Route9
DRC/LVS10
Low Power Design11
Memory Design12
Standard Cell๐ Previous Year Questions
View All โGATE 2024MCQ2M
The minimum number of NAND gates to implement Y = AB + CD is:
GATE 2023NAT2M
In a CMOS inverter with VDD = 1.8V, the switching threshold VM is:
GATE 2022MSQ2M
Which of the following are true for a D flip-flop?
GATE 2021MCQ1M
The number of states in a Moore machine recognising (0+1)*011 is:
GATE 2020NAT1M
A 4-bit ripple counter operates at 16 MHz. The output frequency at Q3 is:
๐ฌ Video Lectures
by Chandan Sirโถ
Introduction & Number Systems
Chapter 1 ยท 48:32
โถ
Boolean Algebra Deep Dive
Chapter 2 ยท 1:02:10
๐
Karnaugh Map โ All Tricks
Chapter 3 ยท 55:18
๐
Combinational Circuits โ MUX, DEMUX
Chapter 4 ยท 1:10:44
๐
Sequential Circuits โ FF, Counters
Chapter 5 ยท 1:25:00